IRL3803S/L
C iss C = C + C
10000
8000
6000
4000
C oss
V GS = 0V, f = 1MHz
C iss = C gs + C gd , C ds SHORTED
C rss = C gd
oss ds gd
15
12
9
6
I D = 71A
V DS = 24V
V DS = 15V
C rss
2000
3
FOR TEST CIRCUIT
0
A
0
SEE FIGURE 13
A
1
10
100
0
40
80
120
160
200
1000
V DS , Drain-to-Source Voltage (V)
Fig 5. Typical Capacitance Vs.
Drain-to-Source Voltage
1000
Q G , Total Gate Charge (nC)
Fig 6. Typical Gate Charge Vs.
Gate-to-Source Voltage
OPERATION IN THIS AREA LIMITED
BY R DS(on)
10μs
100
T J = 175°C
100
100μs
T J = 25°C
1ms
10
V GS = 0V
A
10
T C = 25°C
T J = 175°C
Single Pulse
10ms
A
0.4
0.8
1.2
1.6
2.0
2.4
2.8
3.2
1
10
100
4
V SD , Source-to-Drain Voltage (V)
Fig 7. Typical Source-Drain Diode
Forward Voltage
V DS , Drain-to-Source Voltage (V)
Fig 8. Maximum Safe Operating Area
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